The invention relates to a bus-repeater for coupling at least one first bus to a second bus, by way of which data are transmitted as serial digital signal pulse sequences, comprising at least one first and a second transmit-receive means, to which the first and, respectively, the second bus may be coupled and by way of which the bus-repeater may transmit signal pulse sequences received from the first bus via the second bus and vice versa.
Such a bus, along which data are transmitted as serial, digital signal pulse sequences, is for instance a CAN bus (CAN standing for Controller Area Network). Along such transmission lines termed “CAN high” and “CAN low” transmissions lines one respective participant may transmit digital signal pulse sequences, which are then received by all participants including the transmitting participant. In the case of the CAN protocol a distinction is drawn as regards a signal pulse between two logical states: the bits are either “recessive” (logical 1) or “dominant) (logical 0). If a dominant signal is transmitted from at least one bus participant, then recessive signals, which other participants transmit, are overwritten.
Typically a bus possesses a line topology, in which diverse participants are connected at bus lines terminated by terminal resistors. For many applications it is however advantageous to develop linked systems, in which buses are linked with one another. In the simplest case only two buses are joined together. In more complicated applications the bus arrangement will have a tree-like topology, in which for example two further buses branch off from a first bus.
In each case for coupling two buses a so-called bus-repeater will be necessary, which transmits signal pulse sequences received from one bus to the other bus and vice versa. In the case of known bus-repeaters a microcontroller receives the signal pulse sequences received from one bus by way of a bus interface and transmits same then by way of a further bus interface to the second bus and vice versa. Conventionally, in this case, the signal pulse sequences of entire messages are completely received by the microcontroller before they are passed on to the second bus. This leads to undesired delays during signal transmission between the respectively linked buses. Furthermore, known bus-repeaters are expensive owing to the necessary microcontrollers.